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Reiner Pope – Chip design from the bottom up

Dwarkesh Podcast · 22 MAY 2026 · 81 min

This episode delves into the fundamental workings of AI chips, beginning with basic logic gates and the multiply-accumulate operation, which is central to matrix multiplication. It explores the efficiency gains from architectural innovation…

AI chip designLogic gatesMultiply accumulateMatrix multiplicationFloating point arithmeticCircuit sizeData movementRegister filesSystolic arraysChip clock speedPipeline registersFPGA designASIC designCPU architectureGPU architectureTPU architectureCache memoryScratchpad memoryBranch predictionEnergy consumptionLow precision arithmetic